The Realtek SerDes mode capabilities do not map 1:1 to the
PHY_INTERFACE_MODE_* modes used in the kernel and passed to the PCS.
For example, some PHY chips use the proprietary XSGMII mode for which
there isn't an equivalent in the kernel, or HSGMII.
In the past, this led to problems and confusion using kernel's XGMII to
handle the XSGMII mode, and needed a downstream patch for HSGMII. They
have been solved/worked around for now, but XSGMII is currently not
implemented at all. And who knows what might come in the future.
To make our life easier, introduce a dedicated internal representation
of SerDes modes which differs from kernel's PHY_INTERFACE_MODE_*. This
allows us to map "external" modes to different internal modes as needed
instead of carrying the PHY_INTERFACE_MODE_* through the whole SerDes
configuration code. The PCS driver needs to map PHY_INTERFACE_MODE_* to
RTPCS_SDS_MODE_* in pcs_config, and the latter should be used as the
only one.
Signed-off-by: Jonas Jelonek <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/21146
Signed-off-by: Robert Marko <[email protected]>
#define RTL931X_PS_SERDES_OFF_MODE_CTRL_ADDR (0x13F4)
#define RTL931X_MAC_SERDES_MODE_CTRL(sds) (0x136C + (((sds) << 2)))
+enum rtpcs_sds_mode {
+ RTPCS_SDS_MODE_OFF = 0,
+
+ /* fiber modes */
+ RTPCS_SDS_MODE_1000BASEX,
+ RTPCS_SDS_MODE_2500BASEX,
+ RTPCS_SDS_MODE_10GBASER,
+
+ /* mii modes */
+ RTPCS_SDS_MODE_SGMII,
+ RTPCS_SDS_MODE_HISGMII,
+ RTPCS_SDS_MODE_QSGMII,
+ RTPCS_SDS_MODE_QHSGMII,
+ RTPCS_SDS_MODE_XSGMII,
+
+ RTPCS_SDS_MODE_USXGMII_10GSXGMII,
+ RTPCS_SDS_MODE_USXGMII_10GDXGMII,
+ RTPCS_SDS_MODE_USXGMII_10GQXGMII,
+ RTPCS_SDS_MODE_USXGMII_5GSXGMII,
+ RTPCS_SDS_MODE_USXGMII_5GDXGMII,
+ RTPCS_SDS_MODE_USXGMII_2_5GSXGMII,
+};
+
struct rtpcs_ctrl {
struct device *dev;
struct regmap *map;